Lines Matching +full:0 +full:xa8000
28 FMan block. The offset is 0xc4 from the beginning of the
29 Frame Processing Manager memory map (0xc3000 from the
44 DEVDISR[1] 1 0
49 DCFG_DEVDISR2[6] 1 0
56 DCFG_CCSR_DEVDISR2[24] 1 0
148 muram@0 {
150 ranges = <0 0x000000 0x28000>;
215 cell-index = <0x28>;
217 reg = <0xa8000 0x1000>;
221 cell-index = <0x8>;
223 reg = <0x88000 0x1000>;
227 cell-index = <0x1>;
229 reg = <0x81000 0x1000>;
324 PCS PHY addr must be '0'.
332 reg = <0xf1000 0x1000>;
333 interrupts = <101 2 0 0>;
340 reg = <0xe3120 0xee0>;
344 reg = <0x8>;
353 reg = <0xf1000 0x1000>;
356 pcsphy6: ethernet-phy@0 {
357 reg = <0x0>;
369 ranges = <0 0x400000 0x100000>;
370 reg = <0x400000 0x100000>;
374 96 2 0 0
376 fsl,qman-channel-range = <0x40 0xc>;
378 muram@0 {
380 reg = <0x0 0x28000>;
386 reg = <0x81000 0x1000>;
392 reg = <0x82000 0x1000>;
398 reg = <0x83000 0x1000>;
404 reg = <0x84000 0x1000>;
410 reg = <0x85000 0x1000>;
416 reg = <0x86000 0x1000>;
420 cell-index = <0x8>;
422 reg = <0x88000 0x1000>;
426 cell-index = <0x9>;
428 reg = <0x89000 0x1000>;
432 cell-index = <0xa>;
434 reg = <0x8a000 0x1000>;
438 cell-index = <0xb>;
440 reg = <0x8b000 0x1000>;
444 cell-index = <0xc>;
446 reg = <0x8c000 0x1000>;
450 cell-index = <0x10>;
452 reg = <0x90000 0x1000>;
456 cell-index = <0x28>;
458 reg = <0xa8000 0x1000>;
462 cell-index = <0x29>;
464 reg = <0xa9000 0x1000>;
468 cell-index = <0x2a>;
470 reg = <0xaa000 0x1000>;
474 cell-index = <0x2b>;
476 reg = <0xab000 0x1000>;
480 cell-index = <0x2c>;
482 reg = <0xac000 0x1000>;
486 cell-index = <0x30>;
488 reg = <0xb0000 0x1000>;
493 cell-index = <0>;
494 reg = <0xe0000 0x1000>;
502 reg = <0xe2000 0x1000>;
510 reg = <0xe4000 0x1000>;
518 reg = <0xe6000 0x1000>;
526 reg = <0xf0000 0x1000>;
533 reg = <0xf0000 0x1000>;
539 reg = <0xfe000 0x1000>;
544 reg = <0xf1000 0x1000>;
545 interrupts = <101 2 0 0>;