Lines Matching +full:imx8mq +full:- +full:reset
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joakim Zhang <qiangqing.zhang@nxp.com>
13 - $ref: ethernet-controller.yaml#
18 - enum:
19 - fsl,imx25-fec
20 - fsl,imx27-fec
21 - fsl,imx28-fec
22 - fsl,imx6q-fec
23 - fsl,mvf600-fec
24 - fsl,s32v234-fec
25 - items:
26 - enum:
27 - fsl,imx53-fec
28 - fsl,imx6sl-fec
29 - const: fsl,imx25-fec
30 - items:
31 - enum:
32 - fsl,imx35-fec
33 - fsl,imx51-fec
34 - const: fsl,imx27-fec
35 - items:
36 - enum:
37 - fsl,imx6ul-fec
38 - fsl,imx6sx-fec
39 - const: fsl,imx6q-fec
40 - items:
41 - enum:
42 - fsl,imx7d-fec
43 - const: fsl,imx6sx-fec
44 - items:
45 - const: fsl,imx8mq-fec
46 - const: fsl,imx6sx-fec
47 - items:
48 - enum:
49 - fsl,imx8mm-fec
50 - fsl,imx8mn-fec
51 - fsl,imx8mp-fec
52 - const: fsl,imx8mq-fec
53 - const: fsl,imx6sx-fec
54 - items:
55 - const: fsl,imx8qm-fec
56 - const: fsl,imx6sx-fec
57 - items:
58 - enum:
59 - fsl,imx8qxp-fec
60 - const: fsl,imx8qm-fec
61 - const: fsl,imx6sx-fec
62 - items:
63 - enum:
64 - fsl,imx8ulp-fec
65 - const: fsl,imx6ul-fec
66 - const: fsl,imx6q-fec
75 interrupt-names:
77 - items:
78 - const: int0
79 - items:
80 - const: int0
81 - const: pps
82 - items:
83 - const: int0
84 - const: int1
85 - const: int2
86 - items:
87 - const: int0
88 - const: int1
89 - const: int2
90 - const: pps
108 clock-names:
113 - ipg
114 - ahb
115 - ptp
116 - enet_clk_ref
117 - enet_out
118 - enet_2x_txclk
120 phy-mode: true
122 phy-handle: true
124 fixed-link: true
126 local-mac-address: true
128 mac-address: true
130 nvmem-cells: true
132 nvmem-cell-names: true
134 tx-internal-delay-ps:
137 rx-internal-delay-ps:
140 phy-supply:
144 fsl,num-tx-queues:
147 The property is valid for enet-avb IP, which supports hw multi queues.
151 fsl,num-rx-queues:
154 The property is valid for enet-avb IP, which supports hw multi queues.
158 fsl,magic-packet:
163 fsl,err006687-workaround-present:
169 fsl,stop-mode:
170 $ref: /schemas/types.yaml#/definitions/phandle-array
172 - items:
173 - description: phandle to general purpose register node
174 - description: the gpr register offset for ENET stop request
175 - description: the gpr bit offset for ENET stop request
186 # To avoid these, create a phy node according to ethernet-phy.yaml in the same
187 # directory, and point the FEC's "phy-handle" property to it. Then use
188 # the phy's reset binding, again described by ethernet-phy.yaml.
190 phy-reset-gpios:
193 Should specify the gpio for phy reset.
195 phy-reset-duration:
199 Reset duration in milliseconds. Should present only if property
200 "phy-reset-gpios" is available. Missing the property will have the
204 phy-reset-active-high:
208 If present then the reset sequence using the GPIO specified in the
209 "phy-reset-gpios" property is reversed (H=reset state, L=operation state).
211 phy-reset-post-delay:
215 Post reset delay in milliseconds. If present then a delay of phy-reset-post-delay
216 milliseconds will be observed after the phy-reset-gpios has been toggled.
221 - compatible
222 - reg
223 - interrupts
232 - |
234 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
237 phy-mode = "mii";
238 phy-reset-gpios = <&gpio2 14 0>;
239 phy-supply = <®_fec_supply>;
243 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
246 phy-mode = "mii";
247 phy-reset-gpios = <&gpio2 14 0>;
248 phy-supply = <®_fec_supply>;
249 phy-handle = <ðphy0>;
252 #address-cells = <1>;
253 #size-cells = <0>;
255 ethphy0: ethernet-phy@0 {
256 compatible = "ethernet-phy-ieee802.3-c22";