Lines Matching full:nand
4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
7 title: NAND Chip and NAND Controller Generic Binding
14 The NAND controller should be represented with its own DT node, and
15 all NAND chips attached to this controller should be defined as
16 children nodes of the NAND controller. This representation should be
31 pattern: "^nand-controller(@.*)?"
45 NAND controller (even if they are not used). As many additional
47 lines. 'reg' entries of the NAND chip subnodes become indexes of
53 "^nand@[a-f0-9]$":
55 $ref: "nand-chip.yaml#"
62 nand-ecc-placement:
71 nand-bus-width:
73 Bus width to the NAND chip
78 nand-on-flash-bbt:
89 nand-ecc-maximize:
97 want to make your NAND as reliable as possible.
100 nand-is-boot-medium:
102 Whether or not the NAND chip is a boot medium. Drivers might
107 nand-rb:
116 Ready/Busy pins. Active state refers to the NAND ready state and
122 Active state refers to the NAND Write Protect state and should be
137 nand-controller {
144 nand@0 {
146 /* NAND chip specific properties */
149 nand@1 {