Lines Matching +full:u +full:- +full:boot +full:- +full:spl
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: nand-controller.yaml#
14 - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml#
19 - ingenic,jz4740-nand
20 - ingenic,jz4725b-nand
21 - ingenic,jz4780-nand
25 - description: Bank number, offset and size of first attached NAND chip
26 - description: Bank number, offset and size of second attached NAND chip
27 - description: Bank number, offset and size of third attached NAND chip
28 - description: Bank number, offset and size of fourth attached NAND chip
31 ecc-engine: true
40 "^nand@[a-f0-9]$":
43 rb-gpios:
47 wp-gpios:
48 description: GPIO specifier for the write-protect pin.
52 - compatible
53 - reg
58 - |
59 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
60 memory-controller@13410000 {
61 compatible = "ingenic,jz4780-nemc";
63 #address-cells = <2>;
64 #size-cells = <1>;
74 nand-controller@1 {
75 compatible = "ingenic,jz4780-nand";
78 #address-cells = <1>;
79 #size-cells = <0>;
81 ecc-engine = <&bch>;
83 ingenic,nemc-tAS = <10>;
84 ingenic,nemc-tAH = <5>;
85 ingenic,nemc-tBP = <10>;
86 ingenic,nemc-tAW = <15>;
87 ingenic,nemc-tSTRV = <100>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&pins_nemc>;
95 nand-ecc-step-size = <1024>;
96 nand-ecc-strength = <24>;
97 nand-ecc-mode = "hw";
98 nand-on-flash-bbt;
100 pinctrl-names = "default";
101 pinctrl-0 = <&pins_nemc_cs1>;
104 compatible = "fixed-partitions";
105 #address-cells = <2>;
106 #size-cells = <2>;
109 label = "u-boot-spl";
114 label = "u-boot";
119 label = "u-boot-env";
124 label = "boot";