Lines Matching refs:NAND
1 Atmel NAND flash controller bindings
3 The NAND flash controller node should be defined under the EBI bus (see
5 One or several NAND devices can be defined under this NAND controller.
6 The NAND controller might be connected to an ECC engine.
8 * NAND controller bindings:
30 * NAND device/chip bindings:
33 - reg: describes the CS lines assigned to the NAND device. If the NAND device
36 1st entry: the CS line this NAND chip is connected to
42 - rb-gpios: the GPIO(s) used to check the Ready/Busy status of the NAND.
49 Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND
50 device node, and NAND partitions should be defined under the NAND node as
66 SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page
113 * Put generic NAND/MTD properties and
140 - gpios : specifies the gpio pins to control the NAND device. detect is an
145 - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.