Lines Matching +full:rb +full:- +full:gpios
4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
20 - #size-cells: should be set to 1.
21 - atmel,nfc-io: phandle to the NFC IO block. Only required for sama5d3
23 - atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3
27 - ecc-engine: phandle to the PMECC block. Only meaningful if the SoC embeds
33 - reg: describes the CS lines assigned to the NAND device. If the NAND device
34 exposes multiple CS lines (multi-dies chips), your reg property will
42 - rb-gpios: the GPIO(s) used to check the Ready/Busy status of the NAND.
43 - cs-gpios: the GPIO(s) used to control the CS line.
44 - det-gpios: the GPIO used to detect if a Smartmedia Card is present.
45 - atmel,rb: an integer identifying the native Ready/Busy pin. Only meaningful
56 - compatible: should be one of the following
57 "atmel,at91sam9g45-pmecc"
58 "atmel,sama5d4-pmecc"
59 "atmel,sama5d2-pmecc"
60 "microchip,sam9x60-pmecc"
61 - reg: should contain 2 register ranges. The first one is pointing to the PMECC
70 - compatible: should be "atmel,sama5d3-nfc-io", "syscon".
71 - reg: should contain the I/O range used to interact with the NFC logic.
75 nfc_io: nfc-io@70000000 {
76 compatible = "atmel,sama5d3-nfc-io", "syscon";
80 pmecc: ecc-engine@ffffc070 {
81 compatible = "atmel,at91sam9g45-pmecc";
87 compatible = "atmel,sama5d3-ebi";
88 #address-cells = <2>;
89 #size-cells = <1>;
99 nand_controller: nand-controller {
100 compatible = "atmel,sama5d3-nand-controller";
101 atmel,nfc-sram = <&nfc_sram>;
102 atmel,nfc-io = <&nfc_io>;
103 ecc-engine = <&pmecc>;
104 #address-cells = <2>;
105 #size-cells = <1>;
110 atmel,rb = <0>;
120 -----------------------------------------------------------------------
125 - compatible: The possible values are:
126 "atmel,at91rm9200-nand"
127 "atmel,sama5d2-nand"
128 "atmel,sama5d4-nand"
129 - reg : should specify localbus address and size used for the chip,
135 - atmel,nand-addr-offset : offset for the address latch.
136 - atmel,nand-cmd-offset : offset for the command latch.
137 - #address-cells, #size-cells : Must be present if the device has sub-nodes
140 - gpios : specifies the gpio pins to control the NAND device. detect is an
144 - atmel,nand-has-dma : boolean to support dma transfer for nand read/write.
145 - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
148 - atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware,
150 - atmel,pmecc-cap : error correct capability for Programmable Multibit ECC
152 is "atmel,sama5d2-nand", 32 is also valid.
153 - atmel,pmecc-sector-size : sector size for ECC computation. Supported values
155 - atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM
158 - nand-bus-width : 8 or 16 bus width if not present 8
159 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
161 Nand Flash Controller(NFC) is an optional sub-node
163 - compatible : "atmel,sama5d3-nfc".
164 - reg : should specify the address and size used for NFC command registers,
167 - clocks: phandle to the peripheral clock
169 - atmel,write-by-sram: boolean to enable NFC write by SRAM.
173 compatible = "atmel,at91rm9200-nand";
174 #address-cells = <1>;
175 #size-cells = <1>;
179 atmel,nand-addr-offset = <21>; /* ale */
180 atmel,nand-cmd-offset = <22>; /* cle */
181 nand-on-flash-bbt;
182 nand-ecc-mode = "soft";
183 gpios = <&pioC 13 0 /* rdy */
194 compatible = "atmel,at91rm9200-nand";
195 #address-cells = <1>;
196 #size-cells = <1>;
202 atmel,nand-addr-offset = <21>; /* ale */
203 atmel,nand-cmd-offset = <22>; /* cle */
204 nand-on-flash-bbt;
205 nand-ecc-mode = "hw";
206 atmel,has-pmecc; /* enable PMECC */
207 atmel,pmecc-cap = <2>;
208 atmel,pmecc-sector-size = <512>;
209 atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
210 gpios = <&pioD 5 0 /* rdy */
221 compatible = "atmel,at91rm9200-nand";
222 #address-cells = <1>;
223 #size-cells = <1>;
227 compatible = "atmel,sama5d3-nfc";
228 #address-cells = <1>;
229 #size-cells = <1>;