Lines Matching +full:soc +full:- +full:ip
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
13 Multiple SDHCs might be put into a single Xenon IP, to save size and cost.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
29 - items:
30 - const: marvell,armada-ap807-sdhci
31 - const: marvell,armada-ap806-sdhci
33 - items:
34 - const: marvell,armada-3700-sdhci
35 - const: marvell,sdhci-xenon
41 For "marvell,armada-3700-sdhci", two register areas. The first one
42 for Xenon IP register. The second one for the Armada 3700 SoC PHY PAD
44 "marvell,armada-3700-sdhci" in below.
45 Please also check property marvell,pad-type in below.
47 For other compatible strings, one register area for Xenon IP.
53 clock-names:
56 - const: core
57 - const: axi
62 marvell,xenon-sdhc-id:
71 marvell,xenon-phy-type:
74 - "emmc 5.1 phy"
75 - "emmc 5.0 phy"
78 marvell,xenon-phy-type = "emmc 5.1 phy" eMMC 5.1 PHY is the default
80 marvell,xenon-phy-type = "emmc 5.0 phy"
87 marvell,xenon-phy-znr:
96 marvell,xenon-phy-zpr:
105 marvell,xenon-phy-nr-success-tun:
114 marvell,xenon-phy-tun-step-divider:
120 marvell,xenon-phy-slow-mode:
129 marvell,xenon-tun-count:
133 Xenon SDHC SoC usually doesn't provide re-tuning counter in
135 This property provides the re-tuning counter.
138 - $ref: mmc-controller.yaml#
139 - if:
143 const: marvell,armada-3700-sdhci
149 - description: Xenon IP registers
150 - description: Armada 3700 SoC PHY PAD Voltage Control register
152 marvell,pad-type:
155 - sd
156 - fixed-1-8v
158 Type of Armada 3700 SoC PHY PAD Voltage Controller register.
159 If "sd" is selected, SoC PHY PAD is set as 3.3V at the beginning
161 If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for
164 "marvell,armada-3700-sdhci" in below.
167 - marvell,pad-type
169 - if:
174 - marvell,armada-cp110-sdhci
175 - marvell,armada-ap807-sdhci
176 - marvell,armada-ap806-sdhci
183 clock-names:
185 - const: core
186 - const: axi
190 - compatible
191 - reg
192 - clocks
193 - clock-names
198 - |
200 #include <dt-bindings/interrupt-controller/arm-gic.h>
201 #include <dt-bindings/interrupt-controller/irq.h>
204 compatible = "marvell,armada-ap807-sdhci", "marvell,armada-ap806-sdhci";
208 clock-names = "core", "axi";
209 bus-width = <4>;
210 marvell,xenon-phy-slow-mode;
211 marvell,xenon-tun-count = <11>;
212 non-removable;
213 no-sd;
214 no-sdio;
219 - |
221 #include <dt-bindings/interrupt-controller/arm-gic.h>
222 #include <dt-bindings/interrupt-controller/irq.h>
225 compatible = "marvell,armada-cp110-sdhci";
228 vqmmc-supply = <&sd_vqmmc_regulator>;
229 vmmc-supply = <&sd_vmmc_regulator>;
231 clock-names = "core", "axi";
232 bus-width = <4>;
233 marvell,xenon-tun-count = <9>;
236 - |
237 // For eMMC with compatible "marvell,armada-3700-sdhci":
238 #include <dt-bindings/interrupt-controller/arm-gic.h>
239 #include <dt-bindings/interrupt-controller/irq.h>
242 compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon";
247 clock-names = "core";
248 bus-width = <8>;
249 mmc-ddr-1_8v;
250 mmc-hs400-1_8v;
251 non-removable;
252 no-sd;
253 no-sdio;
257 marvell,pad-type = "fixed-1-8v";
260 - |
261 // For SD/SDIO with compatible "marvell,armada-3700-sdhci":
262 #include <dt-bindings/interrupt-controller/arm-gic.h>
263 #include <dt-bindings/interrupt-controller/irq.h>
266 compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon";
270 vqmmc-supply = <&sd_regulator>;
273 clock-names = "core";
274 bus-width = <4>;
276 marvell,pad-type = "sd";