Lines Matching +full:0 +full:x4140
46 "^mux-controller@[0-9a-f]+$":
51 "^clock-controller@[0-9a-f]+$":
57 "phy@[0-9a-f]+$":
76 reg = <0x00100000 0x1c000>;
83 reg = <0x00004080 0x50>;
87 <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
88 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
89 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
90 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
91 <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
97 reg = <0x4140 0x18>;