Lines Matching +full:apb +full:- +full:base

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
22 register which control the iommu port is at each larb's register base. But
23 for generation 1, the register is at smi ao base(smi always on register
24 base). Besides that, the smi async clock should be prepared and enabled for
31 - enum:
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
34 - mediatek,mt6779-smi-common
35 - mediatek,mt6795-smi-common
36 - mediatek,mt8167-smi-common
37 - mediatek,mt8173-smi-common
38 - mediatek,mt8183-smi-common
39 - mediatek,mt8186-smi-common
40 - mediatek,mt8188-smi-common-vdo
41 - mediatek,mt8188-smi-common-vpp
42 - mediatek,mt8192-smi-common
43 - mediatek,mt8195-smi-common-vdo
44 - mediatek,mt8195-smi-common-vpp
45 - mediatek,mt8195-smi-sub-common
47 - description: for mt7623
49 - const: mediatek,mt7623-smi-common
50 - const: mediatek,mt2701-smi-common
55 power-domains:
60 apb and smi are mandatory. the async is only for generation 1 smi HW.
64 - description: apb is Advanced Peripheral Bus clock, It's the clock for
66 - description: smi is the clock for transfer data and command.
67 - description: Either asynchronous clock to help transform the smi clock
69 - description: gals1 is the path1 clock of gals.
71 clock-names:
77 description: a phandle to the smi-common node above. Only for sub-common.
80 - compatible
81 - reg
82 - power-domains
83 - clocks
84 - clock-names
87 - if: # only for gen1 HW
92 - mediatek,mt2701-smi-common
98 clock-names:
100 - const: apb
101 - const: smi
102 - const: async
104 - if: # only for sub common
109 - mediatek,mt8195-smi-sub-common
112 - mediatek,smi
117 clock-names:
119 - const: apb
120 - const: smi
121 - const: gals0
126 - if: # for gen2 HW that have gals
130 - mediatek,mt6779-smi-common
131 - mediatek,mt8183-smi-common
132 - mediatek,mt8186-smi-common
133 - mediatek,mt8192-smi-common
134 - mediatek,mt8195-smi-common-vdo
135 - mediatek,mt8195-smi-common-vpp
142 clock-names:
144 - const: apb
145 - const: smi
146 - const: gals0
147 - const: gals1
149 - if: # for gen2 HW that don't have gals
153 - mediatek,mt2712-smi-common
154 - mediatek,mt6795-smi-common
155 - mediatek,mt8167-smi-common
156 - mediatek,mt8173-smi-common
163 clock-names:
165 - const: apb
166 - const: smi
171 - |+
172 #include <dt-bindings/clock/mt8173-clk.h>
173 #include <dt-bindings/power/mt8173-power.h>
176 compatible = "mediatek,mt8173-smi-common";
178 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
181 clock-names = "apb", "smi";