Lines Matching +full:srom +full:- +full:page +full:- +full:mode

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/exynos-srom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC SROM Controller driver
10   - Krzysztof Kozlowski <krzk@kernel.org>
13   The SROM controller can be used to attach external peripherals. In this case
19       - const: samsung,exynos4210-srom
24   "#address-cells":
27   "#size-cells":
35       <bank-number> 0 <parent address of bank> <size>
39   "^.*@[0-3],[a-f0-9]+$":
45       of the relevant SROM bank.
55       reg-io-width:
60       samsung,srom-page-mode:
62           If page mode is set, 4 data page mode will be configured,
63           else normal (1 data) page mode will be set.
66       samsung,srom-timing:
67         $ref: /schemas/types.yaml#/definitions/uint32-array
76           Tacp: Page mode access cycle at Page mode (0 - 15)
77           Tcah: Address holding time after CSn (0 - 15)
78           Tcoh: Chip selection hold on OEn (0 - 15)
79           Tacc: Access cycle (0 - 31, the actual time is N + 1)
80           Tcos: Chip selection set-up before OEn (0 - 15)
81           Tacs: Address set-up before CSn (0 - 15)
84       - reg
85       - samsung,srom-timing
88   - compatible
89   - reg
94   - |
96     memory-controller@12560000 {
97         compatible = "samsung,exynos4210-srom";
101   - |
103     memory-controller@12570000 {
104         #address-cells = <2>;
105         #size-cells = <1>;
111         compatible = "samsung,exynos4210-srom";
117             phy-mode = "mii";
118             interrupt-parent = <&gpx0>;
120             reg-io-width = <2>;
121             smsc,irq-push-pull;
122             smsc,force-internal-phy;
124             samsung,srom-page-mode;
125             samsung,srom-timing = <9 12 1 9 1 1>;