Lines Matching +full:external +full:- +full:nodes
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 Video data pipelines usually consist of external devices, e.g. camera sensors,
18 SoC internal blocks are described by DT nodes, placed similarly to other SoC
19 blocks. External devices are represented as child nodes of their respective
20 bus controller nodes, e.g. I2C.
22 Data interfaces on all video devices are described by their child 'port' nodes.
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
48 All 'port' nodes can be grouped under optional 'ports' node, which allows to
49 specify #address-cells, #size-cells properties independently for the 'port'
50 and 'endpoint' nodes and any child device nodes a device might have.
52 Two 'endpoint' nodes are linked with each other through their 'remote-endpoint'
55 cases properties at the peer 'endpoint' nodes will be identical, however they
61 a device is partitioned into multiple data busses, e.g. 16-bit input port
62 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
63 and data-shift properties can be used to assign physical data lines to each
67 --------------------------------
71 endpoint nodes for the device, including unit-addresses and reg properties
75 - $ref: /schemas/graph.yaml#/$defs/endpoint-base
78 slave-mode:
87 bus-type:
90 - 1 # MIPI CSI-2 C-PHY
91 - 2 # MIPI CSI1
92 - 3 # CCP2
93 - 4 # MIPI CSI-2 D-PHY
94 - 5 # Parallel
95 - 6 # BT.656
96 - 7 # DPI
100 bus-width:
106 data-shift:
110 On the parallel data busses, if bus-width is used to specify the number of
111 data lines, data-shift can be used to specify which data lines are used,
112 e.g. "bus-width=<8>; data-shift=<2>;" means, that lines 9:2 are used.
114 hsync-active:
120 vsync-active:
128 data-active:
134 data-enable-active:
140 field-even-active:
146 pclk-sample:
152 sync-on-green-active:
156 Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively.
158 data-lanes:
159 $ref: /schemas/types.yaml#/definitions/uint32-array
168 lane, e.g. for 2-lane MIPI CSI-2 bus we could have "data-lanes = <1 2>;",
172 lane. This property is valid for serial busses only (e.g. MIPI CSI-2).
174 clock-lanes:
181 a MIPI CSI-2 bus we could have "clock-lanes = <0>;", which places the
183 only (e.g. MIPI CSI-2).
185 clock-noncontinuous:
188 Allow MIPI CSI-2 non-continuous clock mode.
190 link-frequencies:
191 $ref: /schemas/types.yaml#/definitions/uint64-array
193 Allowed data bus frequencies. For MIPI CSI-2, for instance, this is the
195 of 64-bit unsigned integers.
197 lane-polarities:
198 $ref: /schemas/types.yaml#/definitions/uint32-array
205 followed by the data lanes in the same order as in data-lanes. Valid
207 the combined length of data-lanes and clock-lanes properties. If the
208 lane-polarities property is omitted, the value must be interpreted as 0