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1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 Video data pipelines usually consist of external devices, e.g. camera sensors,
20 bus controller nodes, e.g. I2C.
23 Configuration of a port depends on other devices participating in the data
29 #address-cells = <1>;
30 #size-cells = <0>;
32 port@0 {
34 endpoint@0 { ... };
41 If a port can be configured to work with more than one remote device on the same
43 one port is present in a device node or there is more than one endpoint at a
44 port, or port node needs to be associated with a selected hardware interface,
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
50 and 'endpoint' nodes and any child device nodes a device might have.
52 Two 'endpoint' nodes are linked with each other through their 'remote-endpoint'
53 phandles. An endpoint subnode of a device contains all properties needed for
57 between two devices, e.g. there are logic signal inverters on the lines.
59 It is allowed for multiple endpoints at a port to be active simultaneously,
60 where supported by a device. For example, in case where a data interface of
61 a device is partitioned into multiple data busses, e.g. 16-bit input port
62 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
63 and data-shift properties can be used to assign physical data lines to each
67 --------------------------------
71 endpoint nodes for the device, including unit-addresses and reg properties
75 - $ref: /schemas/graph.yaml#/$defs/endpoint-base
78 slave-mode:
87 bus-type:
90 - 1 # MIPI CSI-2 C-PHY
91 - 2 # MIPI CSI1
92 - 3 # CCP2
93 - 4 # MIPI CSI-2 D-PHY
94 - 5 # Parallel
95 - 6 # BT.656
96 - 7 # DPI
100 bus-width:
106 data-shift:
110 On the parallel data busses, if bus-width is used to specify the number of
111 data lines, data-shift can be used to specify which data lines are used,
112 e.g. "bus-width=<8>; data-shift=<2>;" means, that lines 9:2 are used.
114 hsync-active:
116 enum: [ 0, 1 ]
118 Active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
120 vsync-active:
122 enum: [ 0, 1 ]
124 Active state of the VSYNC signal, 0/1 for LOW/HIGH respectively. Note,
128 data-active:
130 enum: [ 0, 1 ]
134 data-enable-active:
136 enum: [ 0, 1 ]
140 field-even-active:
142 enum: [ 0, 1 ]
146 pclk-sample:
148 enum: [ 0, 1 ]
150 Sample data on rising (1) or falling (0) edge of the pixel clock signal.
152 sync-on-green-active:
154 enum: [ 0, 1 ]
156 Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively.
158 data-lanes:
159 $ref: /schemas/types.yaml#/definitions/uint32-array
163 # Assume up to 9 physical lane indices
168 lane, e.g. for 2-lane MIPI CSI-2 bus we could have "data-lanes = <1 2>;",
169 assuming the clock lane is on hardware lane 0. If the hardware does not
171 from 0 or 1 onwards, depending on whether or not there is also a clock
172 lane. This property is valid for serial busses only (e.g. MIPI CSI-2).
174 clock-lanes:
176 # Assume up to 9 physical lane indices
180 lane number, while the value of an entry indicates physical lane, e.g. for
181 a MIPI CSI-2 bus we could have "clock-lanes = <0>;", which places the
182 clock lane on hardware lane 0. This property is valid for serial busses
183 only (e.g. MIPI CSI-2).
185 clock-noncontinuous:
188 Allow MIPI CSI-2 non-continuous clock mode.
190 link-frequencies:
191 $ref: /schemas/types.yaml#/definitions/uint64-array
193 Allowed data bus frequencies. For MIPI CSI-2, for instance, this is the
195 of 64-bit unsigned integers.
197 lane-polarities:
198 $ref: /schemas/types.yaml#/definitions/uint32-array
200 maxItems: 9
202 enum: [ 0, 1 ]
205 followed by the data lanes in the same order as in data-lanes. Valid
206 values are 0 (normal) and 1 (inverted). The length of the array should be
207 the combined length of data-lanes and clock-lanes properties. If the
208 lane-polarities property is omitted, the value must be interpreted as 0
213 enum: [ 0, 1 ]
215 Whether the clock signal is used as clock (0) or strobe (1). Used with