Lines Matching +full:iommu +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-decoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 - mediatek,mt8173-vcodec-dec
21 - mediatek,mt8183-vcodec-dec
32 clock-names:
34 - const: vcodecpll
35 - const: univpll_d2
36 - const: clk_cci400_sel
37 - const: vdec_sel
38 - const: vdecpll
39 - const: vencpll
40 - const: venc_lt_sel
41 - const: vdec_bus_clk_src
43 assigned-clocks: true
45 assigned-clock-parents: true
47 assigned-clock-rates: true
49 power-domains:
56 List of the hardware port in respective IOMMU block for current Socs.
57 Refer to bindings/iommu/mediatek,iommu.yaml.
59 dma-ranges:
62 Describes the physical address space of IOMMU maps to memory.
75 - compatible
76 - reg
77 - interrupts
78 - clocks
79 - clock-names
80 - iommus
81 - assigned-clocks
82 - assigned-clock-parents
85 - if:
90 - mediatek,mt8183-vcodec-dec
94 - mediatek,scp
96 - if:
101 - mediatek,mt8173-vcodec-dec
105 - mediatek,vpu
110 - |
111 #include <dt-bindings/interrupt-controller/arm-gic.h>
112 #include <dt-bindings/clock/mt8173-clk.h>
113 #include <dt-bindings/memory/mt8173-larb-port.h>
114 #include <dt-bindings/interrupt-controller/irq.h>
115 #include <dt-bindings/power/mt8173-power.h>
118 compatible = "mediatek,mt8173-vcodec-dec";
132 iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
133 <&iommu M4U_PORT_HW_VDEC_PP_EXT>,
134 <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>,
135 <&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>,
136 <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>,
137 <&iommu M4U_PORT_HW_VDEC_UFO_EXT>,
138 <&iommu M4U_PORT_HW_VDEC_VLD_EXT>,
139 <&iommu M4U_PORT_HW_VDEC_VLD2_EXT>;
141 power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
150 clock-names = "vcodecpll",
158 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
163 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
166 assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>;