Lines Matching +full:0 +full:x16023000
119 reg = <0x16000000 0x100>, /*VDEC_SYS*/
120 <0x16020000 0x1000>, /*VDEC_MISC*/
121 <0x16021000 0x800>, /*VDEC_LD*/
122 <0x16021800 0x800>, /*VDEC_TOP*/
123 <0x16022000 0x1000>, /*VDEC_CM*/
124 <0x16023000 0x1000>, /*VDEC_AD*/
125 <0x16024000 0x1000>, /*VDEC_AV*/
126 <0x16025000 0x1000>, /*VDEC_PP*/
127 <0x16026800 0x800>, /*VP8_VD*/
128 <0x16027000 0x800>, /*VP6_VD*/
129 <0x16027800 0x800>, /*VP8_VL*/
130 <0x16028400 0x400>; /*VP9_VD*/
166 assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>;