Lines Matching +full:cn9900 +full:- +full:broken +full:- +full:page1 +full:- +full:regspace
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
15 revisions, replacing the MMIO register interface with in-memory command
21 pattern: "^iommu@[0-9a-f]*"
23 const: arm,smmu-v3
32 interrupt-names:
34 - const: combined
40 - minItems: 1
43 - eventq # Event Queue not empty
44 - gerror # Global Error activated
45 - cmdq-sync # CMD_SYNC complete
46 - priq # PRI Queue not empty
48 '#iommu-cells':
51 dma-coherent:
59 msi-parent: true
61 hisilicon,broken-prefetch-cmd:
65 cavium,cn9900-broken-page1-regspace:
70 doesn't support SMMU page1 register space.
73 - compatible
74 - reg
75 - '#iommu-cells'
80 - |+
81 #include <dt-bindings/interrupt-controller/arm-gic.h>
82 #include <dt-bindings/interrupt-controller/irq.h>
85 compatible = "arm,smmu-v3";
91 interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
92 dma-coherent;
93 #iommu-cells = <1>;
94 msi-parent = <&its 0xff0000>;