Lines Matching +full:non +full:- +full:operational
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
17 well detect interrupts when the GIC is non-operational.
28 - enum:
29 - qcom,sc7180-pdc
30 - qcom,sc7280-pdc
31 - qcom,sdm845-pdc
32 - qcom,sm6350-pdc
33 - qcom,sm8150-pdc
34 - qcom,sm8250-pdc
35 - qcom,sm8350-pdc
36 - const: qcom,pdc
41 - description: PDC base register region
42 - description: Edge or Level config register for SPI interrupts
44 '#interrupt-cells':
47 interrupt-controller: true
49 qcom,pdc-ranges:
50 $ref: /schemas/types.yaml#/definitions/uint32-matrix
55 - description: starting PDC port
56 - description: GIC hwirq number for the PDC port
57 - description: number of interrupts in sequence
64 - compatible
65 - reg
66 - '#interrupt-cells'
67 - interrupt-controller
68 - qcom,pdc-ranges
73 - |
74 #include <dt-bindings/interrupt-controller/irq.h>
76 pdc: interrupt-controller@b220000 {
77 compatible = "qcom,sdm845-pdc", "qcom,pdc";
79 qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
80 #interrupt-cells = <2>;
81 interrupt-parent = <&intc>;
82 interrupt-controller;
85 wake-device {
86 interrupts-extended = <&pdc 2 IRQ_TYPE_LEVEL_HIGH>;