Lines Matching full:gic
4 $id: http://devicetree.org/schemas/interrupt-controller/mti,gic.yaml#
14 The MIPS GIC routes external interrupts to individual VPEs and IRQ pins.
16 interrupts which can be used as IPIs. The GIC also includes a free-running
21 const: mti,gic
27 file 'dt-bindings/interrupt-controller/mips-gic.h'. The 2nd cell is the
28 GIC interrupt number. The 3d cell encodes the interrupt flags setting up
34 Base address and length of the GIC registers space. If not present,
42 Specifies the list of CPU interrupt vectors to which the GIC may not
55 Specifies the range of GIC interrupts that are reserved for IPIs.
69 MIPS GIC includes a free-running global timer, per-CPU count/compare
70 timers, and a watchdog. Currently only the GIC Timer is supported.
73 const: mti,gic-timer
77 Interrupt for the GIC local timer, so normally it's suppose to be of
107 #include <dt-bindings/interrupt-controller/mips-gic.h>
111 compatible = "mti,gic";
119 compatible = "mti,gic-timer";
125 #include <dt-bindings/interrupt-controller/mips-gic.h>
129 compatible = "mti,gic";
135 compatible = "mti,gic-timer";
142 compatible = "mti,gic";