Lines Matching +full:detector +full:- +full:enable

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Antoniu Miclaus <antoniu.miclaus@analog.com>
21       - adi,adrf6780
26   spi-max-frequency:
34   clock-names:
36       - const: lo_in
38   clock-output-names:
41   adi,vga-buff-en:
43       RF Variable Gain Amplifier Buffer Enable. Gain is controlled by
47   adi,lo-buff-en:
49       Local Oscillator Amplifier Enable. Disable to put the part in
53   adi,if-mode-en:
55       Intermediate Frequency Mode Enable. Either IF Mode or I/Q Mode
59   adi,iq-mode-en:
61       I/Q Mode Enable. Either IF Mode or I/Q Mode can be enabled at a
65   adi,lo-x2-en:
72   adi,lo-ppf-en:
79   adi,lo-en:
81       Enable additional cirtuitry in the LO chain. Disable to put the
85   adi,uc-bias-en:
87       Enable all bias circuitry thourghout the entire part.
91   adi,lo-sideband:
97   adi,vdet-out-en:
99       VDET Output Select Enable. Expose the RF detector output to the
103   '#clock-cells':
107   adi,lo-x2-en: [ "adi,lo-en" ]
108   adi,lo-ppf-en: [ "adi,lo-en" ]
111   - compatible
112   - reg
113   - clocks
114   - clock-names
119   - |
121       #address-cells = <1>;
122       #size-cells = <0>;
126         spi-max-frequency = <1000000>;
128         clock-names = "lo_in";