Lines Matching +full:zynqmp +full:- +full:ams
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq Ultrascale AMS controller
10 - Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
13 The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors
14 that can be used to sample external voltages and monitor on-die operating
16 The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and
18 All designs should have AMS registers, but PS and PL are optional. The
19 AMS controller can work with only PS, only PL and both PS and PL
21 should always have AMS module property. Providing PS & PL module is optional.
23 AMS Channel Details
27 …--------------------------------------------------------------------------------------------------…
28 AMS CTRL |0 |System PLLs voltage measurement, VCC_PSPLL. |Voltage
35 …--------------------------------------------------------------------------------------------------…
49 …--------------------------------------------------------------------------------------------------…
54 |24 |ADC Reference N- voltage measurement. |Voltage
81 …--------------------------------------------------------------------------------------------------…
86 - xlnx,zynqmp-ams
92 description: AMS Controller register space
97 - description: AMS reference clock
104 '#address-cells':
107 '#size-cells':
110 '#io-channel-cells':
113 ams-ps@0:
117 built-in alarm generation logic that is used to interrupt the processor
123 - xlnx,zynqmp-ams-ps
126 description: Register Space for PS-SYSMON
130 - compatible
131 - reg
135 ams-pl@400:
139 PL-SYSMON is capable of monitoring off chip voltage and temperature.
140 PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring
148 - enum:
149 - xlnx,zynqmp-ams-pl
152 description: Register Space for PL-SYSMON.
155 '#address-cells':
158 '#size-cells':
162 "^channel@([2-4][0-9]|50)$":
182 - reg
187 - compatible
188 - reg
189 - clocks
190 - ranges
195 - |
196 #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
199 #address-cells = <2>;
200 #size-cells = <2>;
202 xilinx_ams: ams@ffa50000 {
203 compatible = "xlnx,zynqmp-ams";
204 interrupt-parent = <&gic>;
208 #address-cells = <1>;
209 #size-cells = <1>;
210 #io-channel-cells = <1>;
213 ams_ps: ams-ps@0 {
214 compatible = "xlnx,zynqmp-ams-ps";
218 ams_pl: ams-pl@400 {
219 compatible = "xlnx,zynqmp-ams-pl";
221 #address-cells = <1>;
222 #size-cells = <0>;