Lines Matching +full:mt8173 +full:- +full:infracfg
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)
10 - Zhiyong Tao <zhiyong.tao@mediatek.com>
11 - Matthias Brugger <matthias.bgg@gmail.com>
18 directly via its own bus interface. See mediatek-thermal bindings
24 - enum:
25 - mediatek,mt2701-auxadc
26 - mediatek,mt2712-auxadc
27 - mediatek,mt6765-auxadc
28 - mediatek,mt7622-auxadc
29 - mediatek,mt8173-auxadc
30 - items:
31 - enum:
32 - mediatek,mt7623-auxadc
33 - const: mediatek,mt2701-auxadc
34 - items:
35 - enum:
36 - mediatek,mt8183-auxadc
37 - mediatek,mt8186-auxadc
38 - mediatek,mt8188-auxadc
39 - mediatek,mt8195-auxadc
40 - mediatek,mt8516-auxadc
41 - const: mediatek,mt8173-auxadc
49 clock-names:
52 "#io-channel-cells":
58 - compatible
59 - reg
60 - clocks
61 - clock-names
62 - "#io-channel-cells"
65 - |
66 #include <dt-bindings/clock/mt8183-clk.h>
68 #address-cells = <2>;
69 #size-cells = <2>;
72 compatible = "mediatek,mt8183-auxadc",
73 "mediatek,mt8173-auxadc";
75 clocks = <&infracfg CLK_INFRA_AUXADC>;
76 clock-names = "main";
77 #io-channel-cells = <1>;