Lines Matching +full:i2c +full:- +full:scl +full:- +full:hz
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
29 const: snps,designware-i2c
30 - description: Microsemi Ocelot SoCs I2C controller
32 - const: mscc,ocelot-i2c
33 - const: snps,designware-i2c
34 - description: Baikal-T1 SoC System I2C controller
35 const: baikal,bt1-sys-i2c
40 - description: DW APB I2C controller memory mapped registers
41 - description: |
43 This registers are specific to the Ocelot I2C-controller.
51 - description: I2C controller reference clock source
52 - description: APB interface clock source
54 clock-names:
57 - const: ref
58 - const: pclk
63 clock-frequency:
64 description: Desired I2C bus clock frequency in Hz
68 i2c-sda-hold-time-ns:
74 i2c-scl-falling-time-ns:
76 The property should contain the SCL falling time in nanoseconds.
80 i2c-sda-falling-time-ns:
88 - description: TX DMA Channel
89 - description: RX DMA Channel
91 dma-names:
93 - const: tx
94 - const: rx
99 - compatible
100 - reg
101 - interrupts
104 - |
105 i2c@f0000 {
106 compatible = "snps,designware-i2c";
109 clock-frequency = <400000>;
111 - |
112 i2c@1120000 {
113 compatible = "snps,designware-i2c";
116 clock-frequency = <400000>;
117 i2c-sda-hold-time-ns = <300>;
118 i2c-sda-falling-time-ns = <300>;
119 i2c-scl-falling-time-ns = <300>;
121 - |
122 i2c@2000 {
123 compatible = "snps,designware-i2c";
125 #address-cells = <1>;
126 #size-cells = <0>;
127 clock-frequency = <400000>;
136 - |
137 i2c@100400 {
138 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
140 pinctrl-0 = <&i2c_pins>;
141 pinctrl-names = "default";