Lines Matching +full:dovdd +full:- +full:supply
1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
16 - qcom,msm8226-cci
17 - qcom,msm8916-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
20 - qcom,sdm845-cci
21 - qcom,sm8250-cci
22 - qcom,sm8450-cci
24 "#address-cells":
27 "#size-cells":
34 clock-names:
41 power-domains:
48 "^i2c-bus@[01]$":
49 $ref: /schemas/i2c/i2c-controller.yaml#
56 clock-frequency:
60 - compatible
61 - clock-names
62 - clocks
63 - interrupts
64 - reg
67 - if:
72 - qcom,msm8996-cci
75 - power-domains
77 - if:
82 - qcom,msm8226-cci
83 - qcom,msm8916-cci
86 i2c-bus@1: false
88 - if:
93 - qcom,msm8226-cci
94 - qcom,msm8974-cci
99 clock-names:
101 - const: camss_top_ahb
102 - const: cci_ahb
103 - const: cci
105 - if:
110 - qcom,msm8916-cci
111 - qcom,msm8996-cci
116 clock-names:
118 - const: camss_top_ahb
119 - const: cci_ahb
120 - const: cci
121 - const: camss_ahb
123 - if:
128 - qcom,sdm845-cci
133 clock-names:
135 - const: camnoc_axi
136 - const: soc_ahb
137 - const: slow_ahb_src
138 - const: cpas_ahb
139 - const: cci
140 - const: cci_src
142 - if:
147 - qcom,sm8250-cci
148 - qcom,sm8450-cci
154 clock-names:
156 - const: camnoc_axi
157 - const: slow_ahb_src
158 - const: cpas_ahb
159 - const: cci
160 - const: cci_src
165 - |
166 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
167 #include <dt-bindings/gpio/gpio.h>
168 #include <dt-bindings/interrupt-controller/arm-gic.h>
172 compatible = "qcom,sdm845-cci";
173 #address-cells = <1>;
174 #size-cells = <0>;
177 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
185 clock-names = "camnoc_axi",
192 assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
194 assigned-clock-rates = <80000000>,
197 pinctrl-names = "default", "sleep";
198 pinctrl-0 = <&cci0_default &cci1_default>;
199 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
201 i2c-bus@0 {
203 clock-frequency = <1000000>;
204 #address-cells = <1>;
205 #size-cells = <0>;
211 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&cam0_default>;
216 clock-names = "xvclk";
217 clock-frequency = <19200000>;
219 dovdd-supply = <&vreg_lvs1a_1p8>;
220 avdd-supply = <&cam0_avdd_2v8>;
221 dvdd-supply = <&cam0_dvdd_1v2>;
225 link-frequencies = /bits/ 64 <360000000 180000000>;
226 data-lanes = <1 2 3 4>;
227 remote-endpoint = <&csiphy0_ep>;
233 cci_i2c1: i2c-bus@1 {
235 clock-frequency = <1000000>;
236 #address-cells = <1>;
237 #size-cells = <0>;
243 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&cam3_default>;
248 clock-names = "xclk";
249 clock-frequency = <24000000>;
251 vdddo-supply = <&vreg_lvs1a_1p8>;
252 vdda-supply = <&cam3_avdd_2v8>;
256 data-lanes = <0 1>;
257 remote-endpoint = <&csiphy3_ep>;