Lines Matching refs:I2C
1 Generic device tree bindings for I2C busses
4 This document describes generic bindings which can be used to describe I2C
12 - compatible - name of I2C bus controller
17 The cells properties above define that an address of children of an I2C bus
30 For I2C adapters that have child nodes that are a mixture of both I2C
31 devices and non-I2C devices, the 'i2c-bus' subnode can be used for
32 populating I2C devices. If the 'i2c-bus' subnode is present, only
33 subnodes of this will be considered as I2C slaves. The properties,
38 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
45 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
49 Number of nanoseconds the SDA signal takes to fall; t(f) in the I2C
100 MCTP over I2C transport.
106 name of I2C slave device
109 One or many I2C slave addresses. These are usually a 7 bit addresses.
130 "irq", "wakeup" and "smbus_alert" names are recognized by I2C core,
141 used by the device. I2C core will assign "irq" interrupt (or the very first
145 adapters that support this feature, may use "host-notify" property. I2C
149 Also, if device is marked as a wakeup source, I2C core will set up "wakeup"