Lines Matching +full:gcc +full:- +full:apq8084
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
27 - qcom,scm-ipq6018
28 - qcom,scm-ipq806x
29 - qcom,scm-ipq8074
30 - qcom,scm-mdm9607
31 - qcom,scm-msm8226
32 - qcom,scm-msm8660
33 - qcom,scm-msm8916
34 - qcom,scm-msm8953
35 - qcom,scm-msm8960
36 - qcom,scm-msm8974
37 - qcom,scm-msm8976
38 - qcom,scm-msm8994
39 - qcom,scm-msm8996
40 - qcom,scm-msm8998
41 - qcom,scm-sc7180
42 - qcom,scm-sc7280
43 - qcom,scm-sc8280xp
44 - qcom,scm-sdm845
45 - qcom,scm-sdx55
46 - qcom,scm-sdx65
47 - qcom,scm-sm6115
48 - qcom,scm-sm6125
49 - qcom,scm-sm6350
50 - qcom,scm-sm8150
51 - qcom,scm-sm8250
52 - qcom,scm-sm8350
53 - qcom,scm-sm8450
54 - qcom,scm-qcs404
55 - const: qcom,scm
61 clock-names:
68 interconnect-names:
71 '#reset-cells':
74 qcom,dload-mode:
75 $ref: /schemas/types.yaml#/definitions/phandle-array
77 - items:
78 - description: phandle to TCSR hardware block
79 - description: offset of the download mode control register
83 - if:
88 - qcom,scm-apq8064
89 - qcom,scm-msm8660
90 - qcom,scm-msm8960
93 clock-names:
95 - const: core
101 - clocks
102 - clock-names
104 - if:
109 - qcom,scm-apq8084
110 - qcom,scm-mdm9607
111 - qcom,scm-msm8916
112 - qcom,scm-msm8953
113 - qcom,scm-msm8974
114 - qcom,scm-msm8976
117 clock-names:
119 - const: core
120 - const: bus
121 - const: iface
128 - clocks
129 - clock-names
132 - compatible
137 - |
138 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
142 compatible = "qcom,scm-msm8916", "qcom,scm";
143 clocks = <&gcc GCC_CRYPTO_CLK>,
144 <&gcc GCC_CRYPTO_AXI_CLK>,
145 <&gcc GCC_CRYPTO_AHB_CLK>;
146 clock-names = "core", "bus", "iface";