Lines Matching +full:tegra186 +full:- +full:bpmp
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The BPMP is a specific processor in Tegra chip, which is designed for
17 defines the resources that would be used by the BPMP firmware driver,
19 CPU and BPMP.
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
34 - ../power/power-domain.yaml
35 - <dt-bindings/power/tegra186-powergate.h>
36 - .../reset/reset.txt
37 - <dt-bindings/reset/tegra186-reset.h>
39 The BPMP implements some services which must be represented by
43 BPMP node.
45 Software can determine whether a child node of the BPMP node
49 provide configuration information regarding the BPMP itself, although
52 The BPMP firmware defines no single global name-/numbering-space for
54 distinct from the numbering scheme for any other service the BPMP may
56 device nodes will have no reg property, and the BPMP node will have no
57 "#address-cells" or "#size-cells" property.
59 The shared memory area for the IPC TX and RX between CPU and BPMP are
66 - items:
67 - enum:
68 - nvidia,tegra194-bpmp
69 - nvidia,tegra234-bpmp
70 - const: nvidia,tegra186-bpmp
71 - const: nvidia,tegra186-bpmp
75 communicate with the BPMP.
80 that the IPC between CPU and BPMP is based on.
84 "#clock-cells":
87 "#power-domain-cells":
90 "#reset-cells":
95 - description: memory read client
96 - description: memory write client
97 - description: DMA read client
98 - description: DMA write client
100 interconnect-names:
102 - const: read
103 - const: write
104 - const: dma-mem # dma-read
105 - const: dma-write
119 - compatible
120 - mboxes
121 - shmem
122 - "#clock-cells"
123 - "#power-domain-cells"
124 - "#reset-cells"
127 - |
128 #include <dt-bindings/interrupt-controller/arm-gic.h>
129 #include <dt-bindings/mailbox/tegra186-hsp.h>
130 #include <dt-bindings/memory/tegra186-mc.h>
133 compatible = "nvidia,tegra186-hsp";
136 interrupt-names = "doorbell";
137 #mbox-cells = <2>;
141 compatible = "nvidia,tegra186-sysram", "mmio-sram";
143 #address-cells = <1>;
144 #size-cells = <1>;
149 label = "cpu-bpmp-tx";
155 label = "cpu-bpmp-rx";
160 bpmp {
161 compatible = "nvidia,tegra186-bpmp";
166 interconnect-names = "read", "write", "dma-mem", "dma-write";
171 #clock-cells = <1>;
172 #power-domain-cells = <1>;
173 #reset-cells = <1>;
176 compatible = "nvidia,tegra186-bpmp-i2c";
177 nvidia,bpmp-bus-id = <5>;
178 #address-cells = <1>;
179 #size-cells = <0>;
183 compatible = "nvidia,tegra186-bpmp-thermal";
184 #thermal-sensor-cells = <1>;