Lines Matching +full:mmio +full:- +full:sram
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
31 - description: SCMI compliant firmware with mailbox transport
33 - const: arm,scmi
34 - description: SCMI compliant firmware with ARM SMC/HVC transport
36 - const: arm,scmi-smc
37 - description: SCMI compliant firmware with SCMI Virtio transport.
40 - const: arm,scmi-virtio
41 - description: SCMI compliant firmware with OP-TEE transport
43 - const: linaro,scmi-optee
52 interrupt-names:
55 mbox-names:
60 - const: tx
61 - const: rx
78 '#address-cells':
81 '#size-cells':
84 atomic-threshold-us:
88 an higher-than-threshold execution latency, should not be considered for
92 arm,smc-id:
97 linaro,optee-channel-id:
100 Channel specifier required when using OP-TEE transport.
108 '#power-domain-cells':
112 - '#power-domain-cells'
120 '#clock-cells':
124 - '#clock-cells'
132 '#clock-cells':
136 - '#clock-cells'
144 '#thermal-sensor-cells':
148 - '#thermal-sensor-cells'
156 '#reset-cells':
160 - '#reset-cells'
174 '^regulators@[0-9a-f]+$':
184 - reg
195 '^protocol@[0-9a-f]+$':
198 Each sub-node represents a protocol supported. If the platform
207 mbox-names:
209 - const: tx
210 - const: rx
220 linaro,optee-channel-id:
223 Channel specifier required when using OP-TEE transport and
227 - reg
230 - compatible
240 interrupt-names: false
243 - mboxes
244 - shmem
251 const: arm,scmi-smc
254 - arm,smc-id
255 - shmem
262 const: linaro,scmi-optee
265 - linaro,optee-channel-id
268 - |
274 mbox-names = "tx", "rx";
278 #address-cells = <1>;
279 #size-cells = <0>;
281 atomic-threshold-us = <10000>;
285 #power-domain-cells = <1>;
290 #clock-cells = <1>;
294 mbox-names = "tx", "rx";
301 #clock-cells = <1>;
306 #thermal-sensor-cells = <1>;
311 #reset-cells = <1>;
317 #address-cells = <1>;
318 #size-cells = <0>;
322 regulator-max-microvolt = <3300000>;
327 regulator-min-microvolt = <500000>;
328 regulator-max-microvolt = <4200000>;
340 #address-cells = <2>;
341 #size-cells = <2>;
343 sram@50000000 {
344 compatible = "mmio-sram";
347 #address-cells = <1>;
348 #size-cells = <1>;
351 cpu_scp_lpri0: scp-sram-section@0 {
352 compatible = "arm,scmi-shmem";
356 cpu_scp_lpri1: scp-sram-section@80 {
357 compatible = "arm,scmi-shmem";
361 cpu_scp_hpri0: scp-sram-section@100 {
362 compatible = "arm,scmi-shmem";
366 cpu_scp_hpri2: scp-sram-section@180 {
367 compatible = "arm,scmi-shmem";
373 - |
376 compatible = "arm,scmi-smc";
378 arm,smc-id = <0xc3000001>;
380 #address-cells = <1>;
381 #size-cells = <0>;
385 #power-domain-cells = <1>;
390 - |
393 compatible = "linaro,scmi-optee";
394 linaro,optee-channel-id = <0>;
396 #address-cells = <1>;
397 #size-cells = <0>;
401 linaro,optee-channel-id = <1>;
403 #clock-cells = <1>;
408 #clock-cells = <1>;
414 #address-cells = <2>;
415 #size-cells = <2>;
417 sram@51000000 {
418 compatible = "mmio-sram";
421 #address-cells = <1>;
422 #size-cells = <1>;
425 cpu_optee_lpri0: optee-sram-section@0 {
426 compatible = "arm,scmi-shmem";