Lines Matching +full:controller +full:- +full:dependent

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA Controller bindings
10   The STM32 DMA is a general-purpose direct memory access controller capable of
12   DMA clients connected to the STM32 DMA controller must use the format
13   described in the dma.txt file, using a four-cell specifier for each
14   channel: a phandle to the DMA controller plus the following four integer cells:
18       dependent:
19         -bit 9: Peripheral Increment Address
22         -bit 10: Memory Increment Address
25         -bit 15: Peripheral Increment Offset Size
27           0x1: offset size is fixed to 4 (32-bit alignment)
28         -bit 16-17: Priority level
33     4. A 32bit bitfield value specifying DMA features which are device dependent:
34        -bit 0-1: DMA FIFO threshold selection
39        -bit 2: DMA direct mode
40          0x0: FIFO mode with threshold selectable with bit 0-1
43        -bit 4: alternative DMA request/acknowledge protocol
46          0x1: Use alternative DMA ACK management, where ACK de-assertion does
47               not wait for the de-assertion of the REQuest, ACK is only managed
53   - Amelie Delaunay <amelie.delaunay@foss.st.com>
56   - $ref: "dma-controller.yaml#"
59   "#dma-cells":
63     const: st,stm32-dma
73     description: Should contain all of the per-channel DMA
82     description: if defined, it indicates that the controller
83       supports memory-to-memory transfer
86   - compatible
87   - reg
88   - clocks
89   - interrupts
94   - |
95     #include <dt-bindings/interrupt-controller/arm-gic.h>
96     #include <dt-bindings/clock/stm32mp1-clks.h>
97     #include <dt-bindings/reset/stm32mp1-resets.h>
98     dma-controller@40026400 {
99       compatible = "st,stm32-dma";
110       #dma-cells = <4>;
113       dma-requests = <8>;