Lines Matching +full:bpmp +full:- +full:bus +full:- +full:id

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
20 - nvidia,tegra124-dsi
21 - nvidia,tegra210-dsi
22 - nvidia,tegra186-dsi
24 - items:
25 - const: nvidia,tegra132-dsi
26 - const: nvidia,tegra124-dsi
38 clock-names:
44 - description: module reset
46 reset-names:
48 - const: dsi
50 operating-points-v2:
53 power-domains:
56 avdd-dsi-csi-supply:
59 nvidia,mipi-calibrate:
62 calibrated. See nvidia,tegra114-mipi.yaml for details.
63 $ref: "/schemas/types.yaml#/definitions/phandle-array"
65 nvidia,ddc-i2c-bus:
70 nvidia,hpd-gpio:
76 $ref: "/schemas/types.yaml#/definitions/uint8-array"
82 nvidia,ganged-mode:
88 - $ref: "../dsi-controller.yaml#"
89 - if:
94 - nvidia,tegra20-dsi
95 - nvidia,tegra30-dsi
100 - description: DSI module clock
101 - description: input for the pixel clock
103 clock-names:
105 - const: dsi
106 - const: parent
111 - description: DSI module clock
112 - description: low-power module clock
113 - description: input for the pixel clock
115 clock-names:
117 - const: dsi
118 - const: lp
119 - const: parent
121 - if:
125 const: nvidia,tegra186-dsi
128 - interrupts
133 - compatible
134 - reg
135 - clocks
136 - clock-names
137 - resets
138 - reset-names
141 - |
142 #include <dt-bindings/clock/tegra186-clock.h>
143 #include <dt-bindings/interrupt-controller/arm-gic.h>
144 #include <dt-bindings/power/tegra186-powergate.h>
145 #include <dt-bindings/reset/tegra186-reset.h>
148 compatible = "nvidia,tegra186-dsi";
151 clocks = <&bpmp TEGRA186_CLK_DSI>,
152 <&bpmp TEGRA186_CLK_DSIA_LP>,
153 <&bpmp TEGRA186_CLK_PLLD>;
154 clock-names = "dsi", "lp", "parent";
155 resets = <&bpmp TEGRA186_RESET_DSI>;
156 reset-names = "dsi";
158 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;