Lines Matching +full:phy +full:- +full:grf
5 - compatible: "rockchip,rk3288-dp",
6 "rockchip,rk3399-edp";
8 - reg: physical base address of the controller and length
10 - clocks: from common clock binding: handle to dp clock.
13 - clock-names: from common clock binding:
16 - resets: Must contain an entry for each entry in reset-names.
19 - pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
20 - pinctrl-0: pin-control mode. should be <&edp_hpd>
22 - reset-names: Must include the name "dp"
24 - rockchip,grf: this soc should set GRF regs, so need get grf here.
26 - ports: there are 2 port nodes with endpoint definitions as defined in
27 Documentation/devicetree/bindings/media/video-interfaces.txt.
32 - clocks: from common clock binding: handle to grf_vio clock.
34 - clock-names: from common clock binding:
35 Required elements: "grf"
39 - phys (required)
40 - phy-names (required)
41 - hpd-gpios (optional)
42 - force-hpd (optional)
43 -------------------------------------------------------------------------------
46 dp-controller: dp@ff970000 {
47 compatible = "rockchip,rk3288-dp";
51 clock-names = "dp", "pclk";
53 phy-names = "dp";
55 rockchip,grf = <&grf>;
57 reset-names = "dp";
59 pinctrl-names = "default";
60 pinctrl-0 = <&edp_hpd>;
64 #address-cells = <1>;
65 #size-cells = <0>;
68 #address-cells = <1>;
69 #size-cells = <0>;
72 remote-endpoint = <&vopb_out_edp>;
76 remote-endpoint = <&vopl_out_edp>;
82 #address-cells = <1>;
83 #size-cells = <0>;
86 remote-endpoint = <&panel_in_edp>
94 edp_hpd: edp-hpd {