Lines Matching +full:height +full:- +full:mm

1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Noralf Trønnes <noralf@tronnes.org>
23 - Power:
24 - Vdd: Power supply for display module
25 - Vddi: Logic level supply for interface signals
26 Combined into one in this binding called: power-supply
27 - Interface:
28 - CSx: Chip select
29 - SCL: Serial clock
30 - Dout: Serial out
31 - Din: Serial in
32 - SDA: Bidrectional in/out
33 - D/CX: Data/command selection, high=data, low=command
34 Called dc-gpios in this binding.
35 - RESX: Reset when low
36 Called reset-gpios in this binding.
40 - Option 1: 9-bit mode and D/CX as the 9th bit
44 - Option 2: 16-bit mode and D/CX as a 9th bit
48 - Option 3: 8-bit mode and D/CX as a separate interface line
52 The panel resolution is specified using the panel-timing node properties
53 hactive (width) and vactive (height). The other mandatory panel-timing
54 properties should be set to zero except clock-frequency which can be
58 hback-porch (x-offset) and vback-porch (y-offset).
61 - $ref: panel-common.yaml#
62 - $ref: /schemas/spi/spi-peripheral-props.yaml#
67 - enum:
68 - sainsmart18
69 - const: panel-mipi-dbi-spi
71 write-only:
77 dc-gpios:
80 Controller data/command selection (D/CX) in 4-line SPI mode.
81 If not set, the controller is in 3-line SPI mode.
84 - compatible
85 - reg
86 - width-mm
87 - height-mm
88 - panel-timing
93 - |
94 #include <dt-bindings/gpio/gpio.h>
97 #address-cells = <1>;
98 #size-cells = <0>;
101 compatible = "sainsmart18", "panel-mipi-dbi-spi";
103 spi-max-frequency = <40000000>;
105 dc-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
106 reset-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
107 write-only;
111 width-mm = <35>;
112 height-mm = <28>;
114 panel-timing {
117 hback-porch = <0>;
118 vback-porch = <0>;
119 clock-frequency = <0>;
120 hfront-porch = <0>;
121 hsync-len = <0>;
122 vfront-porch = <0>;
123 vsync-len = <0>;