Lines Matching +full:sm8250 +full:- +full:dispcc

1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Jonathan Marek <jonathan@marek.ca>
13   - $ref: dsi-phy-common.yaml#
18       - qcom,dsi-phy-7nm
19       - qcom,dsi-phy-7nm-8150
20       - qcom,sc7280-dsi-phy-7nm
24       - description: dsi phy register set
25       - description: dsi phy lane register set
26       - description: dsi pll register set
28   reg-names:
30       - const: dsi_phy
31       - const: dsi_phy_lane
32       - const: dsi_pll
34   vdds-supply:
38   phy-type:
39     description: D-PHY (default) or C-PHY mode
44   - compatible
45   - reg
46   - reg-names
47   - vdds-supply
52   - |
53      #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
54      #include <dt-bindings/clock/qcom,rpmh.h>
56      dsi-phy@ae94400 {
57          compatible = "qcom,dsi-phy-7nm";
61          reg-names = "dsi_phy",
65          #clock-cells = <1>;
66          #phy-cells = <0>;
68          vdds-supply = <&vreg_l5a_0p88>;
69          clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
71          clock-names = "iface", "ref";