Lines Matching +full:dt +full:- +full:bindings
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
24 - items:
25 - const: mediatek,mt2701-disp-ovl
26 - items:
27 - const: mediatek,mt8173-disp-ovl
28 - items:
29 - const: mediatek,mt8183-disp-ovl
30 - items:
31 - const: mediatek,mt8192-disp-ovl
32 - items:
33 - enum:
34 - mediatek,mt7623-disp-ovl
35 - mediatek,mt2712-disp-ovl
36 - const: mediatek,mt2701-disp-ovl
37 - items:
38 - enum:
39 - mediatek,mt8195-disp-ovl
40 - const: mediatek,mt8183-disp-ovl
41 - items:
42 - enum:
43 - mediatek,mt8186-disp-ovl
44 - const: mediatek,mt8192-disp-ovl
52 power-domains:
53 description: A phandle and PM domain specifier as defined by bindings of
55 Documentation/devicetree/bindings/power/power-domain.yaml for details.
59 - description: OVL Clock
64 see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
66 mediatek,gce-client-reg:
70 defined in the header include/dt-bindings/gce/<chip>-gce.h.
71 $ref: /schemas/types.yaml#/definitions/phandle-array
75 - compatible
76 - reg
77 - interrupts
78 - power-domains
79 - clocks
80 - iommus
85 - |
86 #include <dt-bindings/interrupt-controller/arm-gic.h>
87 #include <dt-bindings/clock/mt8173-clk.h>
88 #include <dt-bindings/power/mt8173-power.h>
89 #include <dt-bindings/gce/mt8173-gce.h>
90 #include <dt-bindings/memory/mt8173-larb-port.h>
93 #address-cells = <2>;
94 #size-cells = <2>;
97 compatible = "mediatek,mt8173-disp-ovl";
100 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
103 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;