Lines Matching +full:mt8192 +full:- +full:apmixedsys
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a
21 - mediatek,mt2701-dpi
22 - mediatek,mt7623-dpi
23 - mediatek,mt8173-dpi
24 - mediatek,mt8183-dpi
25 - mediatek,mt8186-dpi
26 - mediatek,mt8192-dpi
27 - mediatek,mt8195-dp-intf
37 - description: Pixel Clock
38 - description: Engine Clock
39 - description: DPI PLL
41 clock-names:
43 - const: pixel
44 - const: engine
45 - const: pll
47 pinctrl-0: true
48 pinctrl-1: true
50 pinctrl-names:
52 - const: default
53 - const: sleep
62 - compatible
63 - reg
64 - interrupts
65 - clocks
66 - clock-names
67 - port
72 - |
73 #include <dt-bindings/interrupt-controller/arm-gic.h>
74 #include <dt-bindings/clock/mt8173-clk.h>
77 compatible = "mediatek,mt8173-dpi";
82 <&apmixedsys CLK_APMIXED_TVDPLL>;
83 clock-names = "pixel", "engine", "pll";
84 pinctrl-names = "default", "sleep";
85 pinctrl-0 = <&dpi_pin_func>;
86 pinctrl-1 = <&dpi_pin_idle>;
90 remote-endpoint = <&hdmi0_in>;