Lines Matching +full:hdmi +full:- +full:tx
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 DWC HDMI TX Encoder
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
25 reg-io-width:
31 clock-names:
34 ddc-i2c-bus:
37 The HDMI DDC bus can be connected to either a system I2C master or the
38 functionally-reduced I2C master contained in the DWC HDMI. When connected
45 phandle to the iomuxc-gpr region containing the HDMI multiplexer control
52 HDMI multiplexer. Each port shall have a single endpoint.
57 description: First input of the HDMI multiplexer
61 description: Second input of the HDMI multiplexer
65 description: Third input of the HDMI multiplexer
69 description: Fourth input of the HDMI multiplexer
72 - required:
73 - port@0
74 - required:
75 - port@1
76 - required:
77 - port@2
78 - required:
79 - port@3
82 - compatible
83 - reg
84 - clocks
85 - clock-names
86 - gpr
87 - interrupts
88 - ports
93 - |
94 #include <dt-bindings/clock/imx6qdl-clock.h>
96 hdmi: hdmi@120000 {
102 clock-names = "iahb", "isfr";
105 #address-cells = <1>;
106 #size-cells = <0>;
112 remote-endpoint = <&ipu1_di0_hdmi>;
120 remote-endpoint = <&ipu1_di1_hdmi>;