Lines Matching full:clock

1 Device Tree Clock bindings for APM X-Gene
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock
12 "apm,xgene-device-clock" - for a X-Gene device clock
13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
17 - reg : shall be the physical PLL register address for the pll clock.
18 - clocks : shall be the input parent clock phandle for the clock. This should
19 be the reference clock.
20 - #clock-cells : shall be set to 1.
21 - clock-output-names : shall be the name of the PLL referenced by derive
22 clock.
24 - clock-names : shall be the name of the PLL. If missing, use the device name.
27 - reg : shall be the physical register address for the pmd clock.
28 - clocks : shall be the input parent clock phandle for the clock.
29 - #clock-cells : shall be set to 1.
30 - clock-output-names : shall be the name of the clock referenced by derive
31 clock.
33 - clock-names : shall be the name of the clock. If missing, use the device name.
43 - clocks : shall be the input parent clock phandle for the clock.
44 - #clock-cells : shall be set to 1.
45 - clock-output-names : shall be the name of the device referenced.
47 - clock-names : shall be the name of the device clock. If missing, use the
63 compatible = "apm,xgene-pcppll-clock";
64 #clock-cells = <1>;
66 clock-names = "pcppll";
68 clock-output-names = "pcppll";
73 compatible = "apm,xgene-pmd-clock";
74 #clock-cells = <1>;
77 clock-output-names = "pmd0clk";
81 compatible = "apm,xgene-socpll-clock";
82 #clock-cells = <1>;
84 clock-names = "socpll";
86 clock-output-names = "socpll";
91 compatible = "apm,xgene-device-clock";
92 #clock-cells = <1>;
94 clock-names = "qmlclk";
97 clock-output-names = "qmlclk";
101 compatible = "apm,xgene-device-clock";
102 #clock-cells = <1>;
104 clock-names = "ethclk";
110 clock-output-names = "ethclk";
114 compatible = "apm,xgene-device-clock";
115 #clock-cells = <1>;
117 clock-names = "apbclk";
129 clock-output-names = "apbclk";