Lines Matching full:divisor

8 the register is one less than the actual divisor value.  E.g:
10 register value		actual divisor value
17 ti,index-starts-at-one - valid divisor values start at 1, not the default
19 register value		actual divisor value
24 ti,index-power-of-two - valid divisor values are powers of two.  E.g:
25 register value		actual divisor value
34 Which will map the resulting values to a divisor table by their index:
35 register value		actual divisor value
38 2			<invalid divisor, skipped>
65 - ti,min-div : min divisor for dividing the input clock rate, only
66   needed if the first divisor is offset from the default value (1)
67 - ti,max-div : max divisor for dividing the input clock rate, only needed
69 - ti,index-starts-at-one : valid divisor programming starts at 1, not zero,
71 - ti,index-power-of-two : valid divisor programming must be a power of two,