Lines Matching +full:msm8998 +full:- +full:gpucc

1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller Binding for MSM8998
10   - Taniya Das <tdas@codeaurora.org>
14   power domains on MSM8998.
16   See also dt-bindings/clock/qcom,gpucc-msm8998.h.
20     const: qcom,msm8998-gpucc
24       - description: Board XO source
25       - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
27   clock-names:
29       - const: xo
30       - const: gpll0
32   '#clock-cells':
35   '#reset-cells':
38   '#power-domain-cells':
45   - compatible
46   - reg
47   - clocks
48   - clock-names
49   - '#clock-cells'
50   - '#reset-cells'
51   - '#power-domain-cells'
56   - |
57     #include <dt-bindings/clock/qcom,gcc-msm8998.h>
58     #include <dt-bindings/clock/qcom,rpmcc.h>
59     clock-controller@5065000 {
60       compatible = "qcom,msm8998-gpucc";
61       #clock-cells = <1>;
62       #reset-cells = <1>;
63       #power-domain-cells = <1>;
66       clock-names = "xo", "gpll0";