Lines Matching +full:protected +full:- +full:clocks

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Bjorn Andersson <bjorn.andersson@linaro.org>
13   Qualcomm global clock control module which supports the clocks, resets and
17   - include/dt-bindings/clock/qcom,gcc-sc8280xp.h
21     const: qcom,gcc-sc8280xp
23   clocks:
25       - description: XO reference clock
26       - description: Sleep clock
27       - description: UFS memory first RX symbol clock
28       - description: UFS memory second RX symbol clock
29       - description: UFS memory first TX symbol clock
30       - description: UFS card first RX symbol clock
31       - description: UFS card second RX symbol clock
32       - description: UFS card first TX symbol clock
33       - description: Primary USB SuperSpeed pipe clock
34       - description: USB4 PHY pipegmux clock source
35       - description: USB4 PHY DP gmux clock source
36       - description: USB4 PHY sys pipegmux clock source
37       - description: USB4 PHY PCIe pipe clock
38       - description: USB4 PHY router max pipe clock
39       - description: Primary USB4 RX0 clock
40       - description: Primary USB4 RX1 clock
41       - description: Secondary USB SuperSpeed pipe clock
42       - description: Second USB4 PHY pipegmux clock source
43       - description: Second USB4 PHY DP gmux clock source
44       - description: Second USB4 PHY sys pipegmux clock source
45       - description: Second USB4 PHY PCIe pipe clock
46       - description: Second USB4 PHY router max pipe clock
47       - description: Secondary USB4 RX0 clock
48       - description: Secondary USB4 RX1 clock
49       - description: Multiport USB first SuperSpeed pipe clock
50       - description: Multiport USB second SuperSpeed pipe clock
51       - description: PCIe 2a pipe clock
52       - description: PCIe 2b pipe clock
53       - description: PCIe 3a pipe clock
54       - description: PCIe 3b pipe clock
55       - description: PCIe 4 pipe clock
56       - description: First EMAC controller reference clock
57       - description: Second EMAC controller reference clock
59   protected-clocks:
63   - compatible
64   - clocks
67   - $ref: qcom,gcc.yaml#
72   - |
73     #include <dt-bindings/clock/qcom,rpmh.h>
74     clock-controller@100000 {
75       compatible = "qcom,gcc-sc8280xp";
77       clocks = <&rpmhcc RPMH_CXO_CLK>,
111       #clock-cells = <1>;
112       #reset-cells = <1>;
113       #power-domain-cells = <1>;