Lines Matching +full:ipq8064 +full:- +full:tsens

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064
10   - $ref: qcom,gcc.yaml#
13   - Ansuel Smith <ansuelsmth@gmail.com>
17   power domains on IPQ8064.
20   - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
21   - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
26       - const: qcom,gcc-ipq8064
27       - const: syscon
31       - description: PXO source
32       - description: CXO source
34   clock-names:
36       - const: pxo
37       - const: cxo
39   thermal-sensor:
43       - $ref: /schemas/thermal/qcom-tsens.yaml#
46   - compatible
47   - clocks
48   - clock-names
53   - |
54     #include <dt-bindings/interrupt-controller/arm-gic.h>
56     gcc: clock-controller@900000 {
57       compatible = "qcom,gcc-ipq8064", "syscon";
60       clock-names = "pxo", "cxo";
61       #clock-cells = <1>;
62       #reset-cells = <1>;
63       #power-domain-cells = <1>;
65       tsens: thermal-sensor {
66         compatible = "qcom,ipq8064-tsens";
68         nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
69         nvmem-cell-names = "calib", "calib_backup";
71         interrupt-names = "uplow";
74         #thermal-sensor-cells = <1>;