Lines Matching +full:sm6125 +full:- +full:dispcc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6125.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock Controller Binding for SM6125
10 - Martin Botka <martin.botka@somainline.org>
14 power domains on SM6125.
17 dt-bindings/clock/qcom,dispcc-sm6125.h
22 - qcom,sm6125-dispcc
26 - description: Board XO source
27 - description: Byte clock from DSI PHY0
28 - description: Pixel clock from DSI PHY0
29 - description: Pixel clock from DSI PHY1
30 - description: Link clock from DP PHY
31 - description: VCO DIV clock from DP PHY
32 - description: AHB config clock from GCC
34 clock-names:
36 - const: bi_tcxo
37 - const: dsi0_phy_pll_out_byteclk
38 - const: dsi0_phy_pll_out_dsiclk
39 - const: dsi1_phy_pll_out_dsiclk
40 - const: dp_phy_pll_link_clk
41 - const: dp_phy_pll_vco_div_clk
42 - const: cfg_ahb_clk
44 '#clock-cells':
47 '#power-domain-cells':
54 - compatible
55 - reg
56 - clocks
57 - clock-names
58 - '#clock-cells'
59 - '#power-domain-cells'
64 - |
65 #include <dt-bindings/clock/qcom,rpmcc.h>
66 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
67 clock-controller@5f00000 {
68 compatible = "qcom,sm6125-dispcc";
77 clock-names = "bi_tcxo",
84 #clock-cells = <1>;
85 #power-domain-cells = <1>;