Lines Matching full:must
24 - compatible: Must be "img,pistachio-clk".
25 - reg: Must contain the base address and length of the core clock controller.
26 - #clock-cells: Must be 1. The single cell is the clock identifier.
28 - clocks: Must contain an entry for each clock in clock-names.
29 - clock-names: Must include "xtal" (see "External clocks") and
52 - compatible: Must be "img,pistachio-periph-clk".
53 - reg: Must contain the base address and length of the peripheral clock
55 - #clock-cells: Must be 1. The single cell is the clock identifier.
57 - clocks: Must contain an entry for each clock in clock-names.
58 - clock-names: Must include "periph_sys", the peripheral system clock generated
80 - compatible: Must include "img,pistachio-periph-cr" and "syscon".
81 - reg: Must contain the base address and length of the peripheral general
83 - #clock-cells: Must be 1. The single cell is the clock identifier.
85 - clocks: Must contain an entry for each clock in clock-names.
86 - clock-names: Must include "sys", the system clock generated by the peripheral
106 - compatible: Must include "img,pistachio-cr-top" and "syscon".
107 - reg: Must contain the base address and length of the top-level
109 - clocks: Must contain an entry for each clock in clock-names.
112 - #clock-cells: Must be 1. The single cell is the clock identifier.