Lines Matching +full:pll0 +full:- +full:refclk
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Conor Dooley <conor.dooley@microchip.com>
16 https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html
20 const: microchip,mpfs-ccc
24 - description: PLL0's control registers
25 - description: PLL1's control registers
26 - description: DLL0's control registers
27 - description: DLL1's control registers
35 - description: PLL0's refclk0
36 - description: PLL0's refclk1
37 - description: PLL1's refclk0
38 - description: PLL1's refclk1
39 - description: DLL0's refclk
40 - description: DLL1's refclk
42 clock-names:
45 - const: pll0_ref0
46 - const: pll0_ref1
47 - const: pll1_ref0
48 - const: pll1_ref1
49 - const: dll0_ref
50 - const: dll1_ref
52 '#clock-cells':
57 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
61 - compatible
62 - reg
63 - clocks
64 - clock-names
65 - '#clock-cells'
70 - |
71 clock-controller@38100000 {
72 compatible = "microchip,mpfs-ccc";
75 #clock-cells = <1>;
78 clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",