Lines Matching +full:audio +full:- +full:controller

1 * Amlogic AXG Audio Clock Controllers
3 The Amlogic AXG audio clock controller generates and supplies clock to the
4 other elements of the audio subsystem, such as fifos, i2s, spdif and pdm
9 - compatible	: should be "amlogic,axg-audio-clkc" for the A113X and A113D,
10 		  "amlogic,g12a-audio-clkc" for G12A,
11 		  "amlogic,sm1-audio-clkc" for S905X3.
12 - reg		: physical base address of the clock controller and length of
14 - clocks	: a list of phandle + clock-specifier pairs for the clocks listed
15 		  in clock-names.
16 - clock-names	: must contain the following:
17 		  * "pclk" - Main peripheral bus clock
19 		  * "mst_in[0-7]" - 8 input plls to generate clock signals
20 		  * "slv_sclk[0-9]" - 10 slave bit clocks provided by external
22 		  * "slv_lrclk[0-9]" - 10 slave sample clocks provided by external
24 - resets	: phandle of the internal reset line
25 - #clock-cells	: should be 1.
26 - #reset-cells  : should be 1 on the g12a (and following) soc family
30 preprocessor macros in the dt-bindings/clock/axg-audio-clkc.h header and can be
35 clkc_audio: clock-controller@0 {
36 	compatible = "amlogic,axg-audio-clkc";
38 	#clock-cells = <1>;
49 	clock-names = "pclk",