Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:pll5 +full:- +full:clk

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll5-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 DRAM PLL
10   - Chen-Yu Tsai <wens@csie.org>
11   - Maxime Ripard <mripard@kernel.org>
16   "#clock-cells":
23     const: allwinner,sun4i-a10-pll5-clk
31   clock-output-names:
35   - "#clock-cells"
36   - compatible
37   - reg
38   - clocks
39   - clock-output-names
44   - |
45     clk@1c20020 {
46         #clock-cells = <1>;
47         compatible = "allwinner,sun4i-a10-pll5-clk";
50         clock-output-names = "pll5_ddr", "pll5_other";