Lines Matching +full:cortex +full:- +full:a32
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Rutland <mark.rutland@arm.com>
11 - Will Deacon <will.deacon@arm.com>
16 representation in the device tree should be done as under:-
21 - enum:
22 - apm,potenza-pmu
23 - apple,firestorm-pmu
24 - apple,icestorm-pmu
25 - arm,armv8-pmuv3 # Only for s/w models
26 - arm,arm1136-pmu
27 - arm,arm1176-pmu
28 - arm,arm11mpcore-pmu
29 - arm,cortex-a5-pmu
30 - arm,cortex-a7-pmu
31 - arm,cortex-a8-pmu
32 - arm,cortex-a9-pmu
33 - arm,cortex-a12-pmu
34 - arm,cortex-a15-pmu
35 - arm,cortex-a17-pmu
36 - arm,cortex-a32-pmu
37 - arm,cortex-a34-pmu
38 - arm,cortex-a35-pmu
39 - arm,cortex-a53-pmu
40 - arm,cortex-a55-pmu
41 - arm,cortex-a57-pmu
42 - arm,cortex-a65-pmu
43 - arm,cortex-a72-pmu
44 - arm,cortex-a73-pmu
45 - arm,cortex-a75-pmu
46 - arm,cortex-a76-pmu
47 - arm,cortex-a77-pmu
48 - arm,cortex-a78-pmu
49 - arm,cortex-a510-pmu
50 - arm,cortex-a710-pmu
51 - arm,cortex-x1-pmu
52 - arm,cortex-x2-pmu
53 - arm,neoverse-e1-pmu
54 - arm,neoverse-n1-pmu
55 - arm,neoverse-n2-pmu
56 - arm,neoverse-v1-pmu
57 - brcm,vulcan-pmu
58 - cavium,thunder-pmu
59 - nvidia,denver-pmu
60 - nvidia,carmel-pmu
61 - qcom,krait-pmu
62 - qcom,scorpion-pmu
63 - qcom,scorpion-mp-pmu
67 description: 1 per-cpu interrupt (PPI) or 1 interrupt per core.
69 interrupt-affinity:
70 $ref: /schemas/types.yaml#/definitions/phandle-array
83 the interrupt-affinity property shouldn't be present).
88 qcom,no-pc-write:
93 secure-reg-access:
103 not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
104 in Non-secure state.
107 - compatible