Lines Matching full:decoder

104 		hardware decoder target list.
112 		(RO) CXL decoder objects are enumerated from either a platform
113 		firmware description, or a CXL HDM decoder register set in a
114 		PCIe device (see CXL 2.0 section 8.2.5.12 CXL HDM Decoder
116 		cxl_port container of this decoder, and 'Y' represents the
117 		instance id of a given decoder resource.
127 		decoder's decode window. For decoders of devtype
130 		decode range of the cxl_port ancestor of the decoder's cxl_port,
145 		for this decoders uport, unlocks / resets the decoder.
153 		(RO) Display a comma separated list of the current decoder
155 		configured interleave order of the decoder's dport instances.
164 		(RO) When a CXL decoder is of devtype "cxl_decoder_root", it
169 		memory may be mapped behind this decoder's memory window.
177 		(RO) When a CXL decoder is of devtype "cxl_decoder_switch", it
200 		(RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it
206 		when a decoder straddles the volatile/persistent partition
207 		boundary, and 'none' indicates the decoder is not actively
210 		'mode' can be written, when the decoder is in the 'disabled'
220 		(RO) When a CXL decoder is of devtype "cxl_decoder_endpoint",
231 		(RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it
234 		DPA allocated to this decoder is conveyed in these 2 attributes.
235 		Allocations can be mutated as long as the decoder is in the
240 		instance number disabled decoder with non-zero size. I.e.
251 		(RO) The number of targets across which this decoder's host
255 		decoder's position in the interleave is determined by the
267 		space this decoder claims at address N before the decode rotates
280 		within the decode range bounded by root decoder 'decoderX.Y'.
336 		parent root decoder's address space. When read the size of the
351 		(RO) A region is a contiguous partition of a CXL root decoder
363 		(RW) Write an endpoint decoder object name to 'targetX' where X
368 		position relative to the root decoder interleave. EBUSY is
372 		not an endpoint decoder. Once all positions have been
387 		committed in spec mandated order (last committed decoder id +