Lines Matching refs:loads
78 for the loads, the model will predict whether it is possible for the
79 code to run in such a way that the loads will indeed obtain the
141 shared memory locations and another CPU loads from those locations in
153 A memory model will predict what values P1 might obtain for its loads
196 Since r1 = 1, P0 must store 1 to flag before P1 loads 1 from
197 it, as loads can obtain values only from earlier stores.
199 P1 loads from flag before loading from buf, since CPUs execute
222 each CPU stores to its own shared location and then loads from the
271 X: P1 loads 1 from flag executes before
272 Y: P1 loads 0 from buf executes before
277 and a certain outcome for the loads in a piece of code can happen only
292 Read events correspond to loads from shared memory, such as
504 Usage of the rf relation implicitly assumes that loads will always
596 loads, then either they read from the same store or else the
663 (As a minor curiosity, if this code had used normal loads instead of
733 only internal operations. However, loads, stores, and fences involve
759 to satisfy one of the CPU's loads until it has been processed. On
784 smp_rmb() forces the CPU to execute all po-earlier loads
785 before any po-later loads;
893 inserting the loads from that location into this ordering, by placing
895 store. This leaves the relative positions of loads that read from the
929 CPU 0 loads x obtaining 13;
930 CPU 1 loads x obtaining 13;
975 X and Y are both loads and an smp_rmb() fence occurs between
985 X and Y are both loads, X ->addr Y (i.e., there is an address
1005 we consider address dependencies to loads.
1008 loads in program order if there is an address dependency between them.
1012 that looks as if the loads were executed out of order (see the next
1014 problem when the loads come from READ_ONCE(), and therefore the LKMM
1015 includes address dependencies to loads in the ppo relation.
1018 two loads. This happens when there is a dependency from a load to a
1071 not appear to respect address dependencies to loads. This means that
1111 final effect is that even though the two loads really are executed in
1119 between P1's two loads when the kernel is compiled for the Alpha
1146 the CPU to execute any po-later instructions (or po-later loads in the
1222 An equally simple case involves two loads of the same location that
1273 similar to the previous examples: The value P1 loads from buf gets
1286 But what if we put an smp_rmb() fence between P1's loads? The fence
1287 would force the two loads to be executed in program order, and it
1741 This requires P0 and P2 to execute their loads and stores out of