127 static inline void mcasp_set_bits(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_set_bits()  function
163 	mcasp_set_bits(mcasp, ctl_reg, val);  in mcasp_set_ctl_reg()
190 			mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_clk_pdir()
202 			mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_axr_pdir()
214 		mcasp_set_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_rx()
242 	mcasp_set_bits(mcasp, DAVINCI_MCASP_EVTCTLR_REG,  in mcasp_start_rx()
254 		mcasp_set_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_tx()
280 	mcasp_set_bits(mcasp, DAVINCI_MCASP_EVTCTLX_REG,  in mcasp_start_tx()
464 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
465 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
474 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
475 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
492 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
493 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
495 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
496 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
509 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
512 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
527 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
530 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
570 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
571 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
580 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
581 		mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
596 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);  in davinci_mcasp_set_dai_fmt()
597 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);  in davinci_mcasp_set_dai_fmt()
668 		mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);  in davinci_mcasp_set_sysclk()
669 		mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);  in davinci_mcasp_set_sysclk()
826 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT);  in mcasp_common_hw_param()
843 		mcasp_set_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i),  in mcasp_common_hw_param()
984 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, busel | TXORD);  in mcasp_i2s_hw_param()
989 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD);  in mcasp_i2s_hw_param()
1014 	mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(6) | TXSSZ(15));  in mcasp_dit_hw_param()
1023 	mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | TX_ASYNC);  in mcasp_dit_hw_param()
1028 	mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3));  in mcasp_dit_hw_param()
1031 	mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN);  in mcasp_dit_hw_param()
1980 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_direction_out()
1987 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PFUNC_REG, BIT(offset));  in davinci_mcasp_gpio_direction_out()
1990 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset));  in davinci_mcasp_gpio_direction_out()
2002 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_set()
2019 		mcasp_set_bits(mcasp, DAVINCI_MCASP_PFUNC_REG, BIT(offset));  in davinci_mcasp_gpio_direction_in()