134 static inline void mcasp_clr_bits(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_clr_bits()  function
192 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_clk_pdir()
204 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_axr_pdir()
213 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_rx()
253 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_tx()
297 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLR_REG,  in mcasp_stop_rx()
315 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_stop_rx()
324 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLX_REG,  in mcasp_stop_tx()
343 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_stop_tx()
450 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
451 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
457 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
458 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
510 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
513 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
526 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
529 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
543 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
544 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
546 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
547 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
565 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
566 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
575 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
576 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
593 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);  in davinci_mcasp_set_dai_fmt()
594 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);  in davinci_mcasp_set_dai_fmt()
672 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);  in davinci_mcasp_set_sysclk()
673 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);  in davinci_mcasp_set_sysclk()
830 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS);  in mcasp_common_hw_param()
836 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_REVTCTL_REG, RXDATADMADIS);  in mcasp_common_hw_param()
977 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);  in mcasp_i2s_hw_param()
1025 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS);  in mcasp_dit_hw_param()
1965 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset));  in davinci_mcasp_gpio_free()
1968 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PFUNC_REG, BIT(offset));  in davinci_mcasp_gpio_free()
1982 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_direction_out()
2004 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_set()
2016 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset));  in davinci_mcasp_gpio_direction_in()