27 int hda_dsp_ctrl_link_reset(struct snd_sof_dev *sdev, bool reset)  in hda_dsp_ctrl_link_reset()  argument
37 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL,  in hda_dsp_ctrl_link_reset()
43 		gctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL);  in hda_dsp_ctrl_link_reset()
50 	dev_err(sdev->dev, "error: failed to %s HDA controller gctl 0x%x\n",  in hda_dsp_ctrl_link_reset()
55 int hda_dsp_ctrl_get_caps(struct snd_sof_dev *sdev)  in hda_dsp_ctrl_get_caps()  argument
57 	struct hdac_bus *bus = sof_to_bus(sdev);  in hda_dsp_ctrl_get_caps()
61 	offset = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_LLCH);  in hda_dsp_ctrl_get_caps()
64 		cap = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, offset);  in hda_dsp_ctrl_get_caps()
66 		dev_dbg(sdev->dev, "checking for capabilities at offset 0x%x\n",  in hda_dsp_ctrl_get_caps()
73 			dev_dbg(sdev->dev, "found DSP capability at 0x%x\n",  in hda_dsp_ctrl_get_caps()
76 			sdev->bar[HDA_DSP_PP_BAR] = bus->ppcap;  in hda_dsp_ctrl_get_caps()
79 			dev_dbg(sdev->dev, "found SPIB capability at 0x%x\n",  in hda_dsp_ctrl_get_caps()
82 			sdev->bar[HDA_DSP_SPIB_BAR] = bus->spbcap;  in hda_dsp_ctrl_get_caps()
85 			dev_dbg(sdev->dev, "found DRSM capability at 0x%x\n",  in hda_dsp_ctrl_get_caps()
88 			sdev->bar[HDA_DSP_DRSM_BAR] = bus->drsmcap;  in hda_dsp_ctrl_get_caps()
91 			dev_dbg(sdev->dev, "found GTS capability at 0x%x\n",  in hda_dsp_ctrl_get_caps()
96 			dev_dbg(sdev->dev, "found ML capability at 0x%x\n",  in hda_dsp_ctrl_get_caps()
101 			dev_vdbg(sdev->dev, "found capability %d at 0x%x\n",  in hda_dsp_ctrl_get_caps()
112 void hda_dsp_ctrl_ppcap_enable(struct snd_sof_dev *sdev, bool enable)  in hda_dsp_ctrl_ppcap_enable()  argument
116 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,  in hda_dsp_ctrl_ppcap_enable()
120 void hda_dsp_ctrl_ppcap_int_enable(struct snd_sof_dev *sdev, bool enable)  in hda_dsp_ctrl_ppcap_int_enable()  argument
124 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,  in hda_dsp_ctrl_ppcap_int_enable()
128 void hda_dsp_ctrl_misc_clock_gating(struct snd_sof_dev *sdev, bool enable)  in hda_dsp_ctrl_misc_clock_gating()  argument
132 	snd_sof_pci_update_bits(sdev, PCI_CGCTL, PCI_CGCTL_MISCBDCGE_MASK, val);  in hda_dsp_ctrl_misc_clock_gating()
140 int hda_dsp_ctrl_clock_power_gating(struct snd_sof_dev *sdev, bool enable)  in hda_dsp_ctrl_clock_power_gating()  argument
146 	snd_sof_pci_update_bits(sdev, PCI_CGCTL, PCI_CGCTL_ADSPDCGE, val);  in hda_dsp_ctrl_clock_power_gating()
150 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,  in hda_dsp_ctrl_clock_power_gating()
155 	snd_sof_pci_update_bits(sdev, PCI_PGCTL, PCI_PGCTL_ADSPPGD, val);  in hda_dsp_ctrl_clock_power_gating()
160 int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset)  in hda_dsp_ctrl_init_chip()  argument
162 	struct hdac_bus *bus = sof_to_bus(sdev);  in hda_dsp_ctrl_init_chip()
172 	hda_dsp_ctrl_misc_clock_gating(sdev, false);  in hda_dsp_ctrl_init_chip()
176 		ret = hda_dsp_ctrl_link_reset(sdev, true);  in hda_dsp_ctrl_init_chip()
178 			dev_err(sdev->dev, "error: failed to reset HDA controller\n");  in hda_dsp_ctrl_init_chip()
185 		ret = hda_dsp_ctrl_link_reset(sdev, false);  in hda_dsp_ctrl_init_chip()
187 			dev_err(sdev->dev, "error: failed to exit HDA controller reset\n");  in hda_dsp_ctrl_init_chip()
214 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_init_chip()
220 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,  in hda_dsp_ctrl_init_chip()
229 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS,  in hda_dsp_ctrl_init_chip()
238 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,  in hda_dsp_ctrl_init_chip()
244 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPLBASE,  in hda_dsp_ctrl_init_chip()
246 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPUBASE,  in hda_dsp_ctrl_init_chip()
258 	hda_dsp_ctrl_misc_clock_gating(sdev, true);  in hda_dsp_ctrl_init_chip()
263 void hda_dsp_ctrl_stop_chip(struct snd_sof_dev *sdev)  in hda_dsp_ctrl_stop_chip()  argument
265 	struct hdac_bus *bus = sof_to_bus(sdev);  in hda_dsp_ctrl_stop_chip()
275 		snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()
283 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,  in hda_dsp_ctrl_stop_chip()
287 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,  in hda_dsp_ctrl_stop_chip()
294 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()
300 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,  in hda_dsp_ctrl_stop_chip()
309 	snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS,  in hda_dsp_ctrl_stop_chip()
318 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()
320 		snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,  in hda_dsp_ctrl_stop_chip()